FPGA Implementation for Fast and Accurate Medical Image Segmentation
DOI:
https://doi.org/10.53907/enpesj.v6i1.367Keywords:
DRLSE, FPGA, GVF, Level Set.Abstract
This work presents a comprehensive study and hardware implementation of two advanced medical image segmentation methods: Gradient Vector Flow and Distance Regularized Level Set Evolution. Thesis approaches are widely used in image processing due to their ability to accurately extract complex contours, particularly in concave and noisy regions.
However, their high algorithmic complexity leads to significance computational cost , limiting their use in real-time applications. To address these limitations, an implementation on a Field-Programmable Gate Array FPGA is proposed , leveraging hardware parallelism to enhance performance.
A simulation phase was conducted using MATLAB on real medical images ( brain and breast MRI scans). The results demonstrate that the GVF method is effective in handling concave boundaries, while the DRLSE method exhibits greater robustness to topological changes and multiple objects.
The hardware implementation was carried out using Vitis HLS and Vivado on a PYNQ-Z2 platform. The results show strong agreement with MATLAB simulations, with negative discrepancies due to numerical precision , along with a significant improvement in processing time.
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